MOS FET power switch circuit

Source: Network Organization Posted in : 2021-08-18 16:44:38

FET is a semiconductor device that uses the electric field effect of the control input loop to control the output loop current. Conduction only by the majority carriers in the semiconductor, also known as unipolar transistor. The FET has the advantages of high input resistance, low noise, low power consumption, large dynamic range, easy integration, no secondary breakdown phenomenon, and wide safe working area. What is the working principle of FET? What are the characteristics of field effect transistors?

FET is a semiconductor device that uses the electric field effect of the control input loop to control the output loop current. Because it only relies on the majority of carriers in the semiconductor to conduct electricity, it is also known as Unipolar transistor. The FET has the advantages of high input resistance, low noise, low power consumption, large dynamic range, easy integration, no secondary breakdown phenomenon, and wide safe working area. What is the working principle of FET? What are the characteristics of field effect transistors?

What is the working principle of FET and what are the characteristics of FET

The working principle of the field effect transistor is said in one sentence, that is, "the ID flowing through the channel between the drain and the source is formed by the pn junction between the gate and the channel. The reverse biased gate voltage controls ID". To be more precise, the width of the path through which ID flows, that is, the cross-sectional area of the channel, is controlled by the change in the reverse bias of the pn junction, resulting in a change in the expansion of the depletion layer. In the unsaturated region of VGS=0, because the expansion of the transition layer is not very large, according to the electric field of VDS applied between the drain and the source, some electrons in the source region are pulled by the drain, that is, from the drain A current ID flows to the source. The transition layer extending from the gate to the drain forms part of the channel as a plugging type, and the ID is saturated. This state is called pinch-off. This means that the transition layer blocks part of the channel, not the current being cut off. Since there is no free movement of electrons and holes in the transition layer, it has almost insulating properties in an ideal state, and it is generally difficult for current to flow. But at this time, the electric field between the drain and the source is actually two transition layers in contact with the lower part of the drain and the gate, and the high-speed electrons pulled by the drift electric field pass through the transition layer. The saturation phenomenon of ID occurs because the intensity of the drift electric field is almost constant. Secondly, VGS changes in the negative direction, let VGS=VGS(off), at this time, the transition layer roughly covers the whole area. Moreover, most of the electric field of VDS is applied to the transition layer, and the electric field that pulls electrons to the drift direction is only a short part close to the source, which makes the current unable to flow.

MOS FET power switch circuit

MOS field effect transistor is also called metal oxide semiconductor field effect transistor (MetalOxideSemiconductor FieldEffect Transistor, MOSFET). It generally has two types of depletion and enhancement. Enhanced MOS field effect transistors can be divided into NPN type and PNP type. NPN type is usually called N-channel type, PNP type is also called P-channel type. For the N-channel FET, the source and drain are connected to the N-type semiconductor, and for the P-channel FET, the source and drain are connected to the P-type semiconductor. The output current of the FET is controlled by the input voltage (or electric field). It can be considered that the input current is very small or there is no input current, which makes the device have a high input impedance, and this is also what we call a FET. s reason.
When a forward voltage is applied to the diode (the P terminal is connected to the positive pole, and the N terminal is connected to the negative pole), the diode is turned on, and its PN junction has a current passing through it. This is because when the P-type semiconductor terminal is at a positive voltage, the negative electrons in the N-type semiconductor are attracted and flock to the P-type semiconductor terminal to which the positive voltage is applied, while the positrons in the P-type semiconductor terminal are directed towards the N-type semiconductor terminal. movement, thereby forming a conduction current. In the same way, when a reverse voltage is applied to the diode (P terminal is connected to the negative pole, N terminal is connected to the positive pole), the voltage at the P-type semiconductor terminal is negative at this time, the positive electrons are gathered at the P-type semiconductor terminal, and the negative electrons are gathered at the N terminal. Type semiconductor terminal, electrons do not move, no current flows through its PN junction, and the diode is cut off. When there is no voltage on the gate, it can be seen from the previous analysis that there will be no current flowing between the source and the drain, and the FET is in the off state at this time (Figure 7a). When a positive voltage is applied to the gate of the N-channel MOS field effect transistor, due to the action of the electric field, the negative electrons of the source and drain of the N-type semiconductor are attracted and rushed to the gate, but due to the effect of the electric field The blocking of the oxide film allows electrons to gather in the P-type semiconductor between the two N-channels (see Figure 7b), thereby forming a current that conducts the source and drain. It can be imagined that there is a trench between two N-type semiconductors, and the establishment of the gate voltage is equivalent to building a bridge between them. The size of the bridge is determined by the size of the gate voltage.

C-MOS FET

The circuit uses a combination of an enhanced P-channel MOS FET and an enhanced N-channel MOS FET. When the input terminal is low level, the P-channel MOS field effect transistor is turned on, and the output terminal is connected to the positive pole of the power supply. When the input terminal is at a high level, the N-channel MOS field effect transistor is turned on, and the output terminal is connected to the power supply ground. In this circuit, the P-channel MOS field effect transistor and the N-channel MOS field effect transistor always work in opposite states, and their phase input terminals and output terminals are opposite. By this way of working we can get a larger current output. At the same time, due to the influence of leakage current, the gate voltage has not yet reached 0V. Usually, when the gate voltage is less than 1 to 2V, the MOS field effect transistor is turned off. Different FETs have slightly different turn-off voltages. Because of this, the circuit will not cause a short circuit of the power supply because the two tubes are turned on at the same time.

Features of FETs
(1) FETs are voltage-controlled devices, which control ID (drain current) through VGS (gate-source voltage);
(2) The current at the control input end of the FET is extremely small, so its input resistance (107 ~ 1012Ω) is very large.
(3) It uses majority carriers to conduct electricity, so its temperature stability is better; (4) The voltage amplification factor of the amplifier circuit composed of it is smaller than the voltage amplification of the amplifier circuit composed of triodes Coefficient; (5) The FET has strong anti-radiation capability; (6) Because it does not have shot noise caused by electron diffusion in chaotic motion, the noise is low.